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[2023-May-24]Design rule checking (DRC) Violation Prediction Through Convolutional Neural Network in IC Physical Design

Institute of Information Systems and Applications

Speaker:

Prof. Yu-Guang Chen (陳聿廣), Assistant Professor,

Department of Electrical Engineering, National Central University

Topic:

Design rule checking (DRC) Violation Prediction Through Convolutional Neural Network in IC Physical Design

Date:

13:20-15:00 Wednesday 24-May-2023

QR Code:

Link:

https://meet.google.com/xcx-exzx-nod

Location:

Delta 103

Hosted by:

Prof. Te-Chuan Chiu

Abstract

Design Rule Checking (DRC) is one of the most important metrics in physical design procedure to evaluate quality of a detail route. The prediction of DRC violation (DRV) in the early stage can reduce the iterations of design procedure and improve the efficiency of the physical design closure. Several researchers have applied machine-learning techniques to predict the DRVs of a detail route at different design stages with various input features. In this talk, I will introduce a machine learning model to predict DRVs with the information obtained after placement stage. Specifically, we build a ResNet-like CNN model to predict whether a DRV may occur in a targeted grid after detail route. Our features consist of not only quantified placement information but also layout-image features to take pin accessibility into account for better prediction result. Moreover, we apply an under-sampling technique to select critical training samples to improve the training efficiency. A series of experiments have been conducted and the results show that compared with previous works, our prediction result can outperform Fully Convolutional Network (FCN) based approaches.

Bio.

Dr. Andy, Yu-Guang Chen received the B.S. degree and Ph.D. degree in Dept. of Computer Science from National Tsing Hua University, Hsinchu, Taiwan, in 2009 and 2016, respectively. He worked as a Lecturer at Missouri University of Science and Technology, MO, USA in 2015, and a research fellow at University of Notre Dame, IN, USA as in 2016. After that, he served as a project assistant of the ICT project at St. Kitts and Nevis with ICDF Taiwan from 2016 to 2017. He joined the Department of Computer Science and Engineering, Yuan Ze University from 2017 to 2019. He is now an Assistant Professor in the Department of Electrical Engineering, National Central University, Taoyuan, Taiwan.
Professor Chen has published several technical papers and has served in the several program committees such as ISVLSI, ASP-DAC, CSTIC, and is now an co-chair of The CAD Contest at ICCAD and CADathlon at ICCAD. He recieved the outstanding teaching award in NCU at 2023. His current research interests include aging-aware design optimization and tolerance, Reliable In-Memory Computing (IMC) design, Machine Learning for Physical Design, Hardware accelerator for edge devices, and Hardware Security.

All faculty and students are welcome to join.

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